This invention relates to a wired substrate and a method of manufacturing the same. In particular, this invention is suitable to manufacturing LSI's used in communication installation and data processing apparatus.
Various structures are already known for wired substrates, which are referred to also as printed circuits. A number of methods have been invented for fabricating a conductive or wiring pattern on a background surface to provide a wired substrate. Ordinarily, semiconductor devices are preliminarily formed in the substrate.
In U.S. Pat. No. 3,461,347 issued to Jerome H. Lemelson, a printed circuit assembly is disclosed in which a metallic pattern formed on an insulative base is electrically isolated by contiguous dielectric portions made of a nonconductive oxide of the metal of the pattern. The electrical assembly of the type revealed by Lemelson has much contributed to manufacture of IC's. The structure is, however defective when applied to fabrication of LSI's. This is because it is necessary according to the technique exemplified by the teaching of Lemelson that the metal be a base metal, such as aluminium, which can be anodized. The conductive pattern of such a base metal is liable to oxidation and corrosion to adversely affect the reliability of LSI's.
In U.S. Pat. No. 3,386,894 issued to Christian Heinrich Maximilian Steppat, a method is revealed for manufacturing wired substrates by selective plating and etching. At first, a first sublayer of a first conductive material is formed on a background surface. A second sublayer of a second conductive material is formed on the first sublayer. A further conductive material is selectively electrodeposited on the second sublayer by using a photoresist. After the photoresist is removed, the second sublayer is selectively etched by using the selectively plated conductive material as a masking layer. Subsequently, the first sublayer is converted to a nonconductive layer at portions where the second sublayer is etched away. A conductive pattern is formed of three layers typically titanium, silver, and gold layers successively stacked on the background surface. The first sublayer is highly adherent to the background surface and should be convertible to the nonconductive portions.
The method disclosed by Steppat is again inadequate for application to manufacture of LSI's. This is because the second sublayer is inevitably side etched. The side etch results from the so-called galvanic corrosion which occurs when different metals are in contact with each other in an electrolyte solution, such as an etching solution. As a result of the side etch, the stacked layers are no more tenaciously adherent to each other when a conductive pattern has a narrow pattern width of 50 microns or less. Moreover, it is infeasible to render the pattern width narrower than 20 microns.
In U.S. Pat. No. 3,663,279 issued to Martin P. Lepselter, a method is disclosed for fabricating a conductive pattern on a semiconductor body. According to Lepselter, a first layer of a first metal is formed on the semiconductor body. A second layer of a second metal is formed on the first layer. The second layer may comprise two sublayers. By using a photoresist, the second layer is selectively etched. After removal of the photoresist, the first layer is oxidized at portions where the second layer is selectively etched away. The whole exposed surface of the oxidized first layer and of the remaining second layer is covered with a passivation film.
Inasmuch as the photoresist is used, galvanic corrosion does not take place when the second layer is formed only of a single metal. However, a small amount of side etch, such as 1 to 2 micros, is unavoidable. In an embodiment of the invention of Lepselter, the first layer consists of zirconium. A platinum layer is formed on the zirconium layer as one of the sublayers. After selective etch of the platinum layer, a gold layer is selectively plated on the remaining platinum layer as another sublayer. With this structure, the adhesion between the platinum and the gold layers becomes weak when the pattern width is 5 microns or narrower.
According to an article contributed by A. Pfahnl et al to "The Solid Films," 13 (1972), pages 51-55, under the title of "Preparation and Properties of Beam Crossovers for Interconnections in Thin Film Circuits," a method is described for preparing beam crossovers. Insofar as a conductive pattern is concerned, a titanium and a palladium layer are successively formed on a glass or ceramic substrate. Gold is selectively plated on the palladium layer by using a photoresist. After removal of the photoresist, the titanium and the palladium layers are selectively etched by using the selectively plated gold layer as an etching resist. The side etch of the palladium layer in a conductive pattern amounts to 7 to 10 microns on each side of the pattern when the palladium layer is 0.1 micron thick. Adhesion between the conductive layers becomes objectionable when the pattern width is 50 microns or narrower. It is impossible to provide a conductive pattern having a 20-micron or narrower pattern width.
In an article contributed by K. V. Heber to "Journal of the Electrochemical Society," Volume 120, No. 10 (October 1973), Technical Notes, pages 1434-1435, and entitled "A Technique for Anodizing IC Aluminium Layers," an arrangement is described for contact of an electrode to an aluminium layer. The electrode is for selectively anodizing adjacent portions of the aluminium layer and is housed in a suction pad made of silicone rubber and having a meniscus surface. The materials for the conductive pattern and the contiguous insulating layer are not different from those used in the above-referenced Lemelson patent. The pad is from 3 to 5 mm in diameter.